Running a very small subset of python on an FPGA is now possible. This Python Hardware CPU (written in an hardware description language) can directly execute a very small subset of python bytecode with one bytecode instruction per Clock cycle.
This is a implementation of a kind of a microprocessor in myhdl which can directly execute, very limited python bytecode. This myhdl description of the processor can be converted to standard VHDL. Since myhdl is written in python the CPU programm and some additional (if needed) hardware description can be handled in the same file. This simplyfies designing a lot.
I was able to run the Python Hardware CPU on the lattice pico development board. Soon i will create a additional page with more information on that for more information on the CPU visit here.
The approach is to directly execute python bytecode (but without all the dynamic features of python) where nearly every instruction is executed in one Clock cycle.
In the end i was able to successfully run python code which is as complex as the following.
global PORTA_IN,PORTB_IN,PORTC_OUT,PORTD_OUT # at least output ports need to be defined as gloabals
#funcas(kkt(3)) # calling a function with an function as an argument would not work
elif 20<=x<25: #x>=20 and x<25: #both work
Another interessting approach for example would be to use a standard microcontroller from opencores or etc.., which can execute c or c++ and than use “Shed Skin” or “Pyrex” or to convert the python code to c or c++ and then load it into a microcontroller on an FPGA or so. Probably “Shed Skin” makes use of some heavy libraries which would blow up the hole thing. Just an idea.